With development of electronic devices in recent years, size reduction, higher performance, and the like are demanded in the semiconductor device employed in the electronic devices. In order to respond to the demands, the stacked semiconductor device in which semiconductor chips are stacked three-dimensionally and arranged is put in practical use.
In one example of such stacked semiconductor device, the semiconductor chips are stacked on a wiring substrate, and then electrode pads of respective semiconductor chips are electrically connected to connection pads of the wiring substrate via a wire.
A related art is disclosed in Japanese Laid-open Patent Publication No. 2000-294725 and Japanese National Publication of International Patent Application No. 2003-521806.
As explained in the column of the preliminary matter described later, in the method of stacking the semiconductor chip as the bare chip on the wiring substrate, particularly in the execution of the small-volume production, production efficiency is bad, and thus an increase in cost is easily caused.